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Espressif Systems /ESP32-S2-ULP /RTC_I2C /INT_CLR

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Interpret as INT_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SLAVE_TRAN_COMP_INT_CLR)SLAVE_TRAN_COMP_INT_CLR 0 (ARBITRATION_LOST_INT_CLR)ARBITRATION_LOST_INT_CLR 0 (MASTER_TRAN_COMP_INT_CLR)MASTER_TRAN_COMP_INT_CLR 0 (TRANS_COMPLETE_INT_CLR)TRANS_COMPLETE_INT_CLR 0 (TIME_OUT_INT_CLR)TIME_OUT_INT_CLR 0 (ACK_ERR_INT_CLR)ACK_ERR_INT_CLR 0 (RX_DATA_INT_CLR)RX_DATA_INT_CLR 0 (TX_DATA_INT_CLR)TX_DATA_INT_CLR 0 (DETECT_START_INT_CLR)DETECT_START_INT_CLR

Description

Clear RTC I2C interrupt

Fields

SLAVE_TRAN_COMP_INT_CLR

RTC_I2C_SLAVE_TRAN_COMP_INT interrupt clear bit
ARBITRATION_LOST_INT_CLR

RTC_I2C_ARBITRATION_LOST_INT interrupt clear bit
MASTER_TRAN_COMP_INT_CLR

RTC_I2C_MASTER_TRAN_COMP_INT interrupt clear bit
TRANS_COMPLETE_INT_CLR

RTC_I2C_TRANS_COMPLETE_INT interrupt clear bit
TIME_OUT_INT_CLR

RTC_I2C_TIME_OUT_INT interrupt clear bit
ACK_ERR_INT_CLR

RTC_I2C_ACK_ERR_INT interrupt clear bit
RX_DATA_INT_CLR

RTC_I2C_RX_DATA_INT interrupt clear bit
TX_DATA_INT_CLR

RTC_I2C_TX_DATA_INT interrupt clear bit
DETECT_START_INT_CLR

RTC_I2C_DETECT_START_INT interrupt clear bit

Links

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Register License

Copyright 2023 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd